debugging makefiles

Debugging makefiles is sucky at best when you're dealing with many includes and an unfamiliar setup.

To start you'll need to identify what Makefiles and includes are actually being called

make -d target > make.log

Near the top make.log will contain a list of includes and related files.  Those are where you want to focus.

Since Makefiles don't really have a debugger it's basically down to a printf like statement alternative.  In this case $(warning ...) to the rescue.  If you have a rogue variable causing you trouble I'd start a the end target and print out all variables.  From there work backwards by including $(warning ) statements to print the state of the variable in question.  You may have to include a doze or more of these, but it's the most straight forward way to get to the bottom of the problem.

Example
$(warning Defaulting to $(CFG))

Example stolen from codeproject
ifndef CFG
CFG=DEBUG
$(warning Defaulting to $(CFG))
endif

Some links of interest
http://www.codeproject.com/KB/cpp/make_quick_look.aspx?display=Print
http://www.netbsd.org/docs/pkgsrc/makefile.html
http://www.ddj.com/development-tools/197003338?pgno=2
http://www.gnu.org/software/make/manual/make.html
http://netbsd.gw.com/cgi-bin/man-cgi?make+1+NetBSD-current